Superior Micro Gadgets, Inc. (NASDAQ:AMD) Morgan Stanley Know-how, Media & Telecom Convention Name March 6, 2023 11:35 AM ET
Firm Members
Mark Papermaster – Chief Know-how Officer
Convention Name Members
Joe Moore – Morgan Stanley
Joe Moore
I am Joe Moore from Morgan Stanley. Very glad to have with us right here as we speak, Mark Papermaster, the Chief Know-how Officer of AMD. So, possibly we may simply get began with a few greater image questions. I imply, I suppose, as you guys take into consideration competing in each microprocessors and graphics with firms that spend greater than you, however you might have a greater GPU, than Intel has, and a greater CPU than NVIDIA has and also you definitely succeeded in each of these markets. Are you able to simply discuss in regards to the challenges of doing that and the alternatives of getting each of these applied sciences going ahead?
Mark Papermaster
Completely, Joe. To begin with, thanks for having me. We’re in an extremely thrilling market, compute, as a result of it is simply exploding. It has been exploding and it is doing nothing, however going to a steeper and steeper hyperbolic development. And what we mentioned for years, we have mentioned for the final decade that servicing this explosive demand in compute requires not only one engine, however a number of engines.
So, that is been our technique for over a decade at AMD. And so having each the CPU and GPU have been fairly basic to us. So, it was prescient by leaders in AMD. It was pushed first to speed up with the graphics processing that’s embedded with a CPU, which all of us use in most any cell system or desktop system now we have as we speak, the PC, and the cell trade. However what we already knew again then, and has executed nothing however moved sooner than we initially anticipated, was that mixture of CPU, GPU and different accelerators within the knowledge middle in essentially the most demanding workloads.
You noticed that first in high-performance computing. That is – high-performance computing, HPC is at all times the harbinger, Joe, of essentially the most demanding workloads. However AI has turned to be the most important shopper of those high-performance heterogeneous workloads. Due to the character of the algorithms, it wants, CPU, GPU, and specialised accelerators. That is what makes it an extremely thrilling time for the trade, and it makes us, at AMD, extremely excited as a result of it is a imaginative and prescient that we have been working for. It is a portfolio that we have steadily constructed up year-after-year, and we consider we’re positioned very, very properly for this hyperbolic development.
Joe Moore
Nice. Possibly we may discuss just a little bit, earlier than we get into the merchandise and markets, in regards to the function of course of expertise for you guys. You have not actually been on the very [leading edge] [ph]. You did not anticipate a few of Intel’s struggles and also you ended up having vital management. As you consider this going ahead, do it’s essential to push the envelope just a little bit extra on course of expertise? Do you assume that Intel will gentle the ship in some unspecified time in the future? And the way do you suppose you are going to have the ability to compete with them as they do?
Mark Papermaster
Course of expertise, clearly – give it some thought as foundational in our semiconductor trade. And also you may say, is that altering is – as expertise evolves. I imply, Joe Moore, you do not ever decelerate, however Moore’s Legislation, it is slowing down. The price of transistors goes up per node. The kind of scaling you get, the kind of circuitry that will get the profit out of every new expertise node, is getting much less. A few of the circuit sorts do not scale.
So, what meaning is a design and course of expertise have at all times been essential, however now they should be actually designed in a partnership. And that is what we do extraordinarily properly. So, we have led with the design method that anticipated the slowing of Moore’s Legislation. A couple of decade in the past, we reengineered AMD engineering method. We went to a modular method. And we got here up with what we referred to as the Infinity structure. So, we may partition out these completely different circuit sorts.
A CPU engine, a GPU engine, separated from the circuitry that you just use to attach it to the IO, to attach it to the reminiscence round it. And we did that to provide us scale. This allowed us to punch above our weight with the assets we had as a result of once we may reuse circuitry throughout our portfolio, shared throughout product traces, and we did it as a result of we anticipated this – the change in fee and tempo of search expertise.
That mentioned, the brand new nodes stay vitally essential, they usually principally stay essential for the engine itself. These transistors wish to function on the most effectivity you possibly can. And that is what every expertise node new brings. Bear in mind, I mentioned the transistors and the brand new node are getting dearer, however they’re nonetheless providing you with effectivity positive aspects, extra efficiency at much less watts of vitality expended.
So, with our modular method, Joe, we work very intently. We’re partnered with TSMC, GLOBALFOUNDRIES. We’re at all times different foundry choices, however with TSMC is our main associate and who we deeply associate in design expertise co-optimization, DTCO. We’re for prime efficiency, just about the lead intro of every new node. And as such, we have leveraged that modular expertise to place the brand new node the place it offers you essentially the most profit. And it stays essential going ahead, actually so far as I can see within the course of expertise highway maps.
Joe Moore
Nice. So, possibly shift to a number of the finish markets, beginning with server. If you happen to may discuss in regards to the significance of Genoa, I do know it is a actually essential new product for you guys. You’ve got talked about it being, type of a much bigger ramp – extra transitional ramp the place Milan and Genoa, type of each do heavy lifting over the course of the yr. Are you able to simply discuss in regards to the significance of Genoa in your highway map?
Mark Papermaster
Sure. Genoa is our fourth-generation x86 EPYC server. And because the fourth era, it incorporates the entire studying of the earlier 3. And what we actually needed to realize, and did obtain, with Genoa was an enormous step in complete price of possession, TCO, however that is the shopping for issue for our enterprise and our knowledge – our large hyperscale accounts.
And in order such, we designed it with a 96 core base. That is the bottom node, 96 cores with numerous I/O, 128 I/O PCIe Gen 5 lanes. Gen 5 was a step ahead on the interconnect customary, has 12 channels of DDR5 reminiscence. That is a brand new reminiscence interface. And the CPU is in 5-nanometer. That is a brand new expertise node, which is ramped precisely as anticipated with our associate, TSMC.
So, it was a giant step ahead. With that kind of generational change and a brand new sockets, all that new reminiscence, new I/O goes into a brand new sockets, and that could be a longer adoption cycle. It goes first within the hyperscale nodes, enterprise can then make the most of it, nevertheless it’s a extra purposeful ramp for us.
And the reason being that Milan, the third-generation EPYC, continues to be the TCO benefit out within the market. It is 64 cores in a extremely environment friendly, price environment friendly and efficiency environment friendly of 7-nanometer node. And so, if you have a look at our stack up, Milan, third-generation EPYC, is a large piece of our product stack together with Genoa on prime.
And that third era nonetheless is a efficiency chief in quite a lot of circumstances versus the simply launched competitor of x86 server. So, it is a – third era may be very, very sturdy. Fourth era knocks it out of the park with a complete price of possession and a consolidation play. So, it’s certainly a really, very, essential ramp for us. It is a very purposeful ramp, and it is going proper on observe.
Joe Moore
Okay. Are you able to discuss to – I do know there was a outstanding blogger who talked about a problem with some type of single channel DDR5 – solely having a single channel obtainable for DDR5. I do not – it looks like you guys have disagreed with a few of these conclusions. However I suppose, simply greater image, you’ve got mentioned it is on observe. You mentioned, you the place you need it to be. Is there something that modifications with that platform within the second half that will increase fee of adoption?
Mark Papermaster
No. You are speaking a couple of single DIMM per channel, 1 DPC. That is the predominant implementation of Genoa. That is what the overwhelming majority of our prospects use. And so working that at 4,800 pace, that was our main plan for launch, and that is what we did. And the two DIMM per channel, which is I believe what you are referring to is following.
So that’s for a focused – a a lot smaller focused set of shoppers. These speeds will probably be introduced later this quarter, and that may ramp as properly, however this variety of prospects for two DIMMs per channel is far smaller.
Joe Moore
Okay. That is useful. I’m wondering if we may discuss server. Your [server progress] [ph] actually in three segments. It is enterprise server, enterprise-facing cloud, after which type of extra internal-facing cloud. Enterprise sever I believe, is your share is the smallest, however I do know you’ve got made some inroads there. Are you able to discuss to your progress?
Mark Papermaster
You guess. To begin with, let’s discuss [indiscernible] going to order of first inner properties on the hyperscale. That’s the quickest adoption. You’ve got seen us develop throughout our EPYC server traces most rapidly there. And the reason being, when you might have a, type of efficiency and vitality effectivity and TCO benefit like we have had with EPYC, that is a straightforward transition for hyperscale as a result of they’re large patrons. They see the TCO benefit. They’ve a set of workloads that they will – it is x86.
So, it [lifts and ships] [ph], and also you’re working, you are getting all of that TCO benefit. So, traditionally, and with Genoa, that is only a very, very fluid ramp, and it is simply very simple with the TCO advantages that we convey. With enterprise, that’s usually just a little little bit of a decrease core rely as a result of the VMs, the hyperscales have, the digital machines, they will make the most of the complete density that now we have in EPYC.
A few of the enterprise accounts nonetheless choose a decrease density of cores. We, in fact, have that. We’ve a full stack up. And so, what we have executed is 2 issues. We have elevated the gross sales drive that now we have that is actually educating our enterprise prospects on the commanding TCO and the commanding sustainability [games] [ph] that now we have. We’ve such an vitality effectivity for compute. Our CIOs are requested by their boards always, what are you doing for sustainability?
Properly, EPYC is a giant piece of that reply as a result of it brings such an vitality effectivity to the compute. And so with that, we’re rising our consciousness within the enterprise trade. We have made super positive aspects in our construction and mainly our ft on the road and our focus for enterprise. We have additionally created, and you will see we simply put some information on that out as we speak, a very simple solution to do a digital machine migration from should you’re working our rivals x86 platform, to run a really, very straight button, push button, digital machine, VM migration over to EPYC.
And so, we expect that will probably be a giant help as properly with enterprise. And there is a third class, and that is the place persons are working each within the cloud and on-prem. They usually’re shifting workloads backwards and forwards. We do this at our IT instantiation at AMD. And we’re extraordinarily properly suited to that case. We’ve such a excessive presence within the cloud. You’ll be able to mimic that in your on-prem and shift your workloads again seamlessly.
Joe Moore
And when you consider these greater cloud workloads, the extra inner dealing with, are you able to discuss in regards to the function of the form of extra cloud native merchandise like Bergamo that you just’re popping out with? And is that market going to be extra aggressive with different architectures? We have seen some arm encroach and issues like that. Are you able to discuss to that?
Mark Papermaster
Sure, cloud native. A few of the – you have a look at a few of these cloud native functions, Java being one among them, and there is many others, Java workloads is what I referred to. They do not want essentially the best frequency. They want lots of throughput. They want lots of core, core density. They needn’t run on the highest efficiency, the best frequency. And so, what’s the nature of the tradition that now we have at AMD is we hear. We hearken to our prospects. We see the place workloads are going.
On this case, we noticed that. And we’re – rapidly pivot our highway map so as to add a swim lane, so as to add a product, I imply the dense cores you’ve got talked about, codenamed Bergamo. So, Genoa – instruction units. You run the identical code precisely as you optimize on Genoa, you possibly can run it on Bergamo. It is optimized for cloud native. So, as a substitute of 96 core cluster, it is 128 cores. Does not run on the similar peak frequency of Genoa and it is optimized for cloud native.
So, we expect we’re very, very enthusiastic about popping out first half of this yr, proper on observe. And it actually gives that compute density benefit for cloud native. However much more importantly, identical to once we added our 3D stack money that accelerated workloads in reminiscent of high-performance compute and seismic evaluation, et cetera, it reveals you that AMD goes to proceed to hearken to our prospects, perceive the place the workloads are going, Joe, and make it possible for we’re there and we’re there with our financial system of scale and making microprocessors.
And that could be a key aspect that we convey to our prospects. Anybody could make their very own silicon and optimize it for a selected workload. We’ve the benefit of creating tens of millions and tens of millions of processors annually with finely-tuned course of spoke growth, check, manufacturing, reliability to serve these markets on the enterprise and knowledge middle, higher high quality required.
Joe Moore
Thanks. I’m wondering if we may shift to inside knowledge facilities to the function of GPUs. You guys have been profitable in cloud gaming, in areas like supercomputers. The place are you with regards to extra of the machine studying kind workloads by way of progress there? And the place is that going to go, going ahead?
Mark Papermaster
Thanks for the query, Joe. We had a really considerate method once we noticed the place AI was going as a result of we knew the kind of compute that it wanted. It actually will get accelerated by parallel processing. It is the character of the algorithms if you do a – each a ahead propagation and a reverse propagation to finish that studying loop. It is very a lot wants parallel processing, vector processing. And so our technique was, we knew we may develop the modern {hardware}.
And so, we began on that path with our AMD Intuition line of GPU processors. And we focus first on HPC as a result of HPC, given the deep heritage we had, we had a really, excellent software program stack already to construct on. It is referred to as the ROCm stack. And so ROCm 4.0 was launched a few years in the past that was manufacturing stage for HPC. And having this sort of modern {hardware} and a manufacturing HPC stack led to key wins throughout the HPC sector.
Whereas that whole growth effort was occurring in HPC, we have been in parallel optimizing for AI workloads, including help for PyTorch, including help for TensorFlow, and the opposite frameworks, and in addition to optimizing inside our GPU instruction set to hurry the processing. Actually excited with the arrival late final yr of ROCm 5.0. The fifth era of our software program stack ROCm is manufacturing stage for AI. Now, should you go to PyTorch, you see solely two software program stacks rated at manufacturing stage on Linux, and that’s AMD and our GPU compute competitor NVIDIA.
So, we’re actually, actually happy with the progress that we’re making. And so, MI250, Intuition 250, is out in manufacturing as we speak, successful in HPC. And now on the early innings of rising on that now manufacturing stage AI software program stack, Intuition is at Azure. You’ve got heard bulletins final yr that [Azure] [ph] was standing up MI250 and beginning – and actually, they have been super companions with us to tune workloads wanted to run on MI250. And so, that is the primary marker is we’re out of the beginning gate with MI250.
We’re extremely excited in regards to the efficiency with MI250. It takes on the [A100] [ph] head on. And so our technique is when you might have a {hardware} that is fully aggressive and the software program, which is arising quickly, however not protecting each market is to focus the place we goal that software program stack. We’re focused, Joe, on the hyperscalers, moderately than making an attempt to hit each vertical market that will want super quantity of code.
And so, it’s properly underway with MI250. And MI300, the following era, is on observe. We’ll be saying that second half of this yr. And that is a beast as a result of it takes 4 GPU CPUs – 4 Genoa CPUs, and embeds it with our graphics processing. So, identical to we shipped mixed CPU and GPU for years in PC and embedded markets, we have now introduced that method to the info middle with the Intuition 300.
So, we could not be extra excited to launch that subsequent yr. It will convey commanding HPC, and it was equally optimized for AI. So once more, coming to market and being introduced second half of this yr and ramping in 2024.
Joe Moore
Nice. After which final knowledge middle query, I suppose, on inference with the main target now on generative AI and value per question as individuals begin to transfer to these kinds of workloads, how does AMD view that? Is {that a} CPU downside to unravel? Is it a GPU downside to unravel? And what do you suppose AMD’s function goes to be?
Mark Papermaster
Joe, nice query. The reply is, it is all of that. Why is that? Inferencing is solely in every single place now. It is in – it will be – it is both there or going to be in nearly each system that you just interface with, whether or not or not it’s a tool on your own home on the wall that is doing pure language recognition or processing of a number of the telemetry it has, all the way in which to the most important compute units that are on the market. And optimizing the way in which that you just do your work, the way in which that you just program and code, the way in which that you just write your subsequent speech present that you just’re giving, you is perhaps tapping into Chat GPT and utilizing the inference capabilities there. However each instance I gave requires a special inferencing.
Let’s begin with the most recent instance. You wish to use Chat GPT that can assist you in that subsequent speech, you are going to want an inferencing functionality that mimics that giant language mannequin the place the coaching was executed in a GPU and positively with the bigger reminiscence area. It could not should be a GPU, however it will have to actually be capable to course of that giant language mannequin. After which as you step by means of the opposite functions, there’s completely different necessities.
So, at AMD, what we’re making an attempt to convey is the fitting inferencing answer for the fitting inferencing downside. And so, it’s GPU for a really dense, giant language mannequin inferencing and sometimes executed in hyperscale. It is leveraging the AI engine that we have efficiently is delivery, that got here to AMD within the Xilinx acquisition, a efficiency main AI engine with a strong manufacturing stage inference optimization stack. That is delivery in our Xilinx adaptive compute product line, and it has been permeated over time elsewhere throughout our product highway map. Once more, inferencing to run in every single place.
We began already – Lisa Su introduced at CES, our Ryzen 7000 product line that has embedded in it, an AI engine that accelerates inference workloads on PC or embedded functions. After which return to the CPU. CPU is the workhorse of inferencing as we speak as a result of if it is a decrease stage inference that may run on the CPU that you just even have with you in your PC as we speak or in your knowledge middle product you might have as we speak that is nonetheless the place the majority of inferencing is finished.
And to that finish, we added vector and neural internet instruction acceleration and AVX-512 into our fourth era Zen, which is in Genoa and the EPYC line, and it is in our Ryzen 7000, which I discussed only a second in the past for PCs and embedded.
Joe Moore
Nice. And I did wish to ask only one query that I am getting loads within the final couple of days. Chinese language server firm, Inspur, was added to the Entity Record final week. Are you able to discuss as to whether it’s – is it too early to say how a lot influence there’s to AMD?
Mark Papermaster
Properly, AMD, like everybody in our trade, we, in fact, comply with the entire tips of export controls from the U.S. authorities, together with, in fact, the Entity Record. And so, we did see that information, however we’re looking for clarification as I believe the remainder of the trade is, as a result of Inspur is a big holding firm. It serves many, many markets. So, we’re trying to get clarification on these tips. After all, we’ll abide by the ensuing info.
Joe Moore
Nice. Thanks. So, shifting gears to Xilinx, which you guys have now owned for some time, the place have you ever seen the synergies of that acquisition? Is it primarily bringing AMD CPUs into the embedded area? Do you continue to see alternatives for Xilinx within the compute area, simply discuss usually to the chance there?
Mark Papermaster
Joe, we truly simply hit on February 14, our one-year anniversary of closing acquisition of Xilinx, and we couldn’t be happier with how the mixing has gone of the cultures, of the corporate, we’re very, very aligned. And so the engineers have simply actually loved coming collectively. And also you see that synergy throughout our product implementation and also you see it by way of how we will market with these merchandise collectively.
After we talked in regards to the acquisition, we talked about what was very, very clear on the time, have a look at the embedded markets, that is what you began with. So – you possibly can have a look at the comm sector the place with the arrival of 5G, we now, the brand new AMD, has an end-to-end from the management airplane with the presence we have already got with our EPYC product line.
By the way in which, it is getting – that has expanded as a result of the fourth era EPYC provides Ciena, a telco optimized model of our fourth-generation EPYC popping out second half of this yr. However that is now paired with the wealthy portfolio Xilinx needed to assault the comms and 5G area with a big put in base.
So, that was form of the plain synergy that we anticipated. You could not have seen that extra on show than Cell World Congress simply the prior week, the place you possibly can simply learn the press, it was properly obtained the depth and breadth and competitiveness of the AMD portfolio that now we have end-to-end to deal with telco. However past that, what we have seen is, the synergies in different embedded markets like automotive.
So, conventional, the legacy AMD headwinds in automotive and also you have a look at, as an illustration, the Telsa infotainment and others. And so many legacy Xilinx wins throughout the embedded area in LiDAR and in parking and picture recognition and evaluation, et cetera. So, that is gone as anticipated.
What’s gone past our expectation is, what we have executed with AI engine, already launching that the AI engine that got here from Xilinx and the – as I mentioned, the PC embedded area, as I discussed earlier in my feedback. And we see alternatives for it elsewhere within the portfolio. After which extra importantly, the software program stack that Victor Peng and the Xilinx crew introduced in on AI was very mature, and it pairs very, very properly with ROCm, the present AI software program stack that AMD had.
We introduced lately that we’re bringing all of that collectively below Victor Peng. So, all of our AI efforts are centralized below Victor and a really, very concerted AI effort throughout AMD. Very enthusiastic about that.
Joe Moore
Nice. So, I did wish to ask you about consumer compute. The market share has gotten very noisy in a difficult market. There’s been stock, type of construct from in every single place. The place do you suppose you’re as we speak from a market share standpoint? Intel appears extra aggressive in a number of the desktop areas, however you guys are nonetheless getting vital wins in industrial and pocket book. Are you able to simply discuss usually to the way you see that shaking out?
Mark Papermaster
We’ve a really aggressive highway map for consumer and a fantastic highway map coming ahead. It is extremely synergistic to the AMD portfolio. Once more, I talked to you in regards to the modular method that we adopted years in the past. And what the PC market advantages from an AMD is, the entire focus that now we have on efficiency and efficiency for lot of vitality flows proper in to the PC market synergistically with our knowledge middle and server compute market.
So, if you have a look at our highway map, you have a look at the most recent desktop announcement is the Ryzen 7,900. And it has a commanding desktop management. It has a vertically stacked 3D cache on prime of the CPU chip, which permits us to easily [stream] [ph] in essentially the most demanding functions like gaming, which is without doubt one of the highest purchasers of high-performance desktops, but additionally work staging functions, et cetera, a profit from this assemble.
And also you see the portfolio synergy, that kind of funding to 3D stack with hybrid bonding a cache reminiscence proper on prime of CPU couldn’t occur with out the modular method in sharing that very same expertise with our server.
Likewise, on pocket book, you see that synergy with our graphics market. So, the Ryzen 7000 collection has not solely that fourth era Zen processor, however RDNA 3, our newest era of graphics processing. It’s an absolute chief in pocket book processing, absolute chief in battery life, and it is the primary x86 processor to embed AI acceleration with the AI engine that I discussed earlier.
So, a management highway map. It is a very aggressive market. The TAM is predicted to be barely down this yr, about 260 million models is what we’re projecting, nevertheless it’s a fantastic marketplace for us, and it actually leverages the synergy of our portfolio.
Joe Moore
Okay. Nice. Properly, that brings us as much as the top of our time. So Mark, thanks a lot. Recognize it.
Mark Papermaster
Thanks very a lot for having me, Joe.
Joe Moore
Thanks.
Query-and-Reply Session
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